International Journal Papers |
Hoseok Seol, Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Lee-Sup Kim |
In-DRAM data initialization |
IEEE Transactions on Very Large Scale Integration Systems, 2017 |
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Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Lee-Sup Kim |
Bank-Group Level Parallelism |
IEEE Transactions on Computers, 2017 |
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Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Yongkee Kwon, Youngsuk Moon, Lee-Sup Kim |
Rank-Level Parallelism in DRAM |
IEEE Transactions on Computers, 2017 |
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Jaemin Jang, Wongyu Shin, Jungwhan Choi, Jinwoong Suh, Yongkee Kwon, Yongju Kim, Lee-Sup Kim |
Refresh-Aware Write Recovery Memory Controller |
IEEE Transactions on Computers, 2017 |
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Wongyu Shin, Jungwhan Choi, Jaemin Jang, Jinwoong Suh, Youngsuk Moon, Yongkee Kwon, Lee-Sup Kim |
DRAM-Latency Optimization Inspired by Relationship between Row-access Time and Refresh Timing |
IEEE Transactions on Computers, 2016 |
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Wongyu Shin, Jungwhan Choi, Jaemin Jang, Jinwoong Suh, Yongkee Kwon, Youngsuk Moon, Hongsik Kim, Lee-Sup Kim |
Q-DRAM: Quick-Access DRAM with Decoupled Restoring from Row-Activation |
IEEE Transactions on Computers, 2016 |
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International Conference Papers |
Hoseok Seol, Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Lee-Sup Kim |
Energy Efficient Data Encoding in DRAM channels exploiting Data Value Similarity |
International Symposium on Computer Architecture, 2016 |
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Jungwhan Choi, Wongyu Shin, Jaemin Jang, Jinwoong Suh, Yongkee Kwon, Youngsuk Moon, Lee-Sup Kim |
Multiple Clone Row DRAM: A Low Latency and Area Optimized DRAM |
International Symposium on Computer Architecture, 2015 |
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