Personal Information
Kwangil Oh
research interests
International Journal Papers
Kwangil Oh, Lee-Sup Kim
A 5-Gb/s/pin transceiver for DDR memory interface with a crosstalk suppression scheme
IEEE Journal of Solid-State Circuits , 2009
 
Kwangil Oh, Lee-Sup Kim
A low-jitter multi-phase digital DLL with closest edge selection scheme for DDR memory interface
IEE Electronics Letters , 2008
 
International Conference Papers
Kwangil Oh, Lee-Sup Kim
A 5-Gb/s/pin transceiver for DDR memory interface with a crosstalk suppression scheme
IEEE Custom Integrated Circuits Conference , 2008
 
Kwangil Oh, Seunghyun Cho, Lee-Sup Kim
A Low Power SoC Bus with Low-leakage and Low-swing Technique
IEEE International Symposium on Circuits and Systems , 2006
 
Byungguk Kim, Kwangil Oh, Lee-Sup Kim
A 500MHz DLL with Second Order Duty Cycle Corrector for Low Jitter
IEEE Cusotm Integrated Circuits Conference , 2005
 
Kwangil Oh, Lee-Sup Kim
A High Performance Low Power Dynamic PLA with Conditional Evaluation Scheme
IEEE International Symposium on Circuits and Systems , 2004
 
Kwangil Oh, Lee-Sup Kim
A Clock Delayed Sleep Mode Domino Logic for Wide Dynamic OR Gate
International Symposium on Low Power Electronics and Design , 2003