Personal Information
Byungguk Kim
research interests
International Journal Papers
Daewoong Lee, Dongil Lee, Yong-Hun Kim, Hyunkyu Jeon, Byungguk Kim, Lee-Sup Kim
A 10.8 Gb/s Quarter-Rate 1 FIR 1 IIR Direct DFE with Non-Time-Overlapping Data Generation for 4:1 CMOS Clockless Multiplexer
IEEE Transactions on Circuits and Systems II: Express Briefs, 2020
 
Byungguk Kim, Lee-Sup Kim
A DLL with Jitter Reduction Techniques and Quadrature Phase Generation for DRAM Interfaces
IEEE Journal of Solid-State Circuits , 2009
 
Byungguk Kim, Lee-Sup Kim
A 20Gb/s 1:4 DEMUX without Inductors and Low-Power Divide-by-2 Circuit in 0.13um CMOS Technology
IEEE Journal of Solid-State Circuits , 2008
 
Byungguk Kim, Lee-Sup Kim
A 250-MHz-2-GHz Wide-Range Delay-Locked Loop
IEEE Journal of Solid-State Circuits , 2005
 
International Conference Papers
Byungguk Kim, Lee-Sup Kim
A DLL with Jitter Reduction Techniques for DRAM Interfaces
IEEE International Solid-State Circuit Conference , 2007
 
Byungguk Kim, Lee-Sup Kim
A 20Gb/s 1:4 DEMUX Without Inductors in 0.13um CMOS
IEEE International Solid-State Circuit Conference , 2006
 
Byungguk Kim, Kwangil Oh, Lee-Sup Kim
A 500MHz DLL with Second Order Duty Cycle Corrector for Low Jitter
IEEEĀ CusotmĀ Integrated Circuits Conference , 2005
 
Byungguk Kim, Lee-Sup Kim
A 250MHz - 2GHz Wide Range Delay-Locked Loop
IEEE Custom Integrated Circuits Conference , 2004