| International Journal Papers |
| Byungdo Yang, Lee-Sup Kim, Jinaeon Lee |
| A low-power ROM using single charge-sharing capacitor and hierarchical bit line |
| IEEE Transactions on Very Large Scale Integration Systems , 2006 |
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| Byungdo Yang, Lee-Sup Kim |
| A Low Power CAM Using Pulsed NAND-NOR Match-Line and Charge-Recycling Search-Line Driver |
| IEEE Journal of Solid-State Circuits , 2005 |
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| Byungdo Yang |
| A Low Power SRAM Using Hierarchical Bit Line and Local Sense Amplifiers |
| IEEE Journal of Solid-State Circuits , 2005 |
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| Byungdo Yang, Lee-Sup Kim |
| An 800MHz Low Power Direct Digital Frequency Synthesizer with an On-Chip DA Converter |
| IEEE Journal of Solid-State Circuits , 2004 |
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| Byungdo Yang |
| Low power charge sharing ROM using dummy bit lines |
| IEE Electronics letters , 2003 |
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| Byungdo Yang, Lee-Sup Kim, Lee-Sup Kim |
| A Low Power Charge Recycling ROM Architecture |
| IEEE Transactions on Very Large Scale Integration Systems , 2003 |
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| Byungdo Yang, Lee-Sup Kim |
| A Low Power ROM using Charge Recycling and Charge Sharing Techniques |
| IEEE Journal of Solid-State Circuits , 2003 |
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| Kihyuk Sung, Byungdo Yang, Lee-Sup Kim |
| Low power clock generator based on an area-reduced interleaved synchronous mirror delay |
| IEE Electronics Letters , 2002 |
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| International Conference Papers |
| Byungdo Yang, Lee-Sup Kim |
| An Error Pattern ROM Compression Method for Continuous Data |
| IEEE International Symposium on Circuits and Systems , 2004 |
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| Byungdo Yang, Lee-Sup Kim |
| A Low Power Charge Sharing Rom Using Dummy Bit Lines |
| IEEE International Symposium on Circuits and Systems , 2003 |
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| Byungdo Yang, Lee-Sup Kim |
| A ROM Compression Method for continuous data |
| IEEE Custom Integrated Circuits Conference , 2002 |
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| Kihyuk Sung, Byungdo Yang, Lee-Sup Kim |
| Low Power Clock Generator Based on An Area-Reduced Interleaved Synchronous Mirror Delay Scheme |
| IEEE International Symposium on Circuits and Systems , 2002 |
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| Byungdo Yang, Lee-Sup Kim |
| A High Speed Direct Digital Frequency Synthesizer Using A Low Power Pipelined Parallel Accumulator |
| IEEE International Symposium on Circuits and Systems , 2002 |
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| Byungdo Yang, Lee-Sup Kim |
| A Low-Power ROM using Charge Recycling and Charge Sharing |
| IEEE International Solid-State Circuit Conference , 2002 |
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| Byungdo Yang, Kihyuk Sung, Youngjoon Kim, Lee-Sup Kim |
| A Direct Digital Frequency Synthesizer Using A New ROM Compression Method |
| European Solid-State Circuits Conference , 2001 |
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| Byungdo Yang, Lee-Sup Kim |
| A low power charge recycling ROM architecture |
| IEEE International Symposium on Circuits and Systems , 2001 |
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| Byungdo Yang, Lee-Sup Kim |
| High-Speed and Low-Swing On-Chip Bus Interface Using Threshold Voltage Driver and Dual Sense Amplifier Receiver |
| European Solid-State Circuits Conference , 2000 |
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