| International Journal Papers |
| Sang-Hye Chung, Young-Ju Kim, Yong-Hun Kim, Lee-Sup Kim |
| A 10Gb/s 0.71pJ/bit Forwarded-Clock Receiver Tolerant to High Frequency Jitter in 65nm CMOS |
| IEEE Transactions on Circuits and Systems II, 2016 |
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| Young-Ju Kim, Sang-Hye Chung, Kyung-Soo Ha, Seung-Jun Bae, Lee-Sup Kim |
| A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver with High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator |
| IEEE Transactions on Circuits and Systems I, 2015 |
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| Sang-Hye Chung, Lee-Sup Kim |
| A 9.6Gb/s 1.22mW/Gb/s Data-Jitter Mixing Forwarded-Clock Receiver in 65nm CMOS |
| IEEE Transactions on Very Large Scale Integration(VLSI) Systems, 2015 |
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| Young-Ju Kim, Sang-Hye Chung, Lee-Sup Kim |
| A Forwarded Clock Receiver Based on Injection-Locked Oscillator with AC Coupled Clock Multiplication Unit in 0.13μm CMOS |
| IEEE Transactions on Very Large Scale Integration Systems , 2015 |
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| Young-Ju Kim, Sang-Hye Chung, Lee-Sup Kim |
| A Quarter-rate Forwarded Clock Receiver based on ILO with Low Jitter Tracking Bandwidth Variation Using Phase Shifting Phenomenon in 65nm CMOS |
| IEEE Transactions on Circuits and Systems I, 2014 |
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| Sang-Hye Chung, Young-Ju Kim, Kyung-Soo Ha, Seung-Jun Bae, Jung-Bae Lee, Lee-Sup Kim |
| A Forwarded-Clock Receiver with Constant and Wide-Range Jitter-Tracking Bandwidth |
| IEEE Transactions on Circuits and Systems-II, 2014 |
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| Seok-Hoon Kim, Sang-Hye Chung, Young-Jun Kim, Hong-Yun Kim, Kyusik Chung, Lee-Sup Kim |
| A Mobile 3D Display Processor with A Bandwidth-Saving Subdivider |
| IEEE Transactions on Very Large Scale Integration Systems, 2012 |
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| International Conference Papers |
| Jihwan Seol, Young-Ju Kim, Sang-Hye Chung, Kyung-Soo Ha, Seung-Jun Bae, Jung-Bae Lee, Joo Sun Choi, Lee-Sup Kim |
| An 8Gb/s 0.65mW/Gb/s Forwarded Clock Receiver Using an ILO with Dual Feedback Loop and Quadrature Injection Scheme |
| IEEE International Solid-State Circuit Conference, 2013 |
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| Sang-Hye Chung, Lee-Sup Kim |
| A 1.22mW/Gb/s 9.6Gb/s Data Jitter Mixing Forwarded-Clock Receiver Robust against Power Noise with 1.92ns Latency Mismatch between Data and Clock in 65nm CMOS |
| IEEE Symposium on VLSI Circuits, 2012 |
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| Young-Ju Kim, Sang-Hye Chung, Lee-Sup Kim |
| A 7.4Gb/s Forwarded Clock Receiver Based on First-Harmonic Injection-Locked Oscillator Using AC Coupled Clock Multiplication Unit in 0.13um CMOS |
| IEEE Custom Integrated Circuits Conference, 2011 |
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| Seungwook Paek, Jiehwan Oh, Sang-Hye Chung, Lee-Sup Kim |
| Area-Efficient Dynamic Thermal Management Unit Using MDLL with Shared DLL Scheme for Many-Core Processors |
| IEEE International Symposium on Circuits and Systems, 2011 |
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| Sang-Hye Chung, Kyung-Soo Ha, Lee-Sup Kim |
| An 8Gb/s Forwarded-Clock I/O Receiver with up to 1GHz Constant Jitter Tracking Bandwidth Using a Weak Injection-Locked Oscillator in 0.13um CMOS |
| IEEE Symposium on VLSI Circuits, 2011 |
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| Sang-Hye Chung, Kyu-Dong Hwang, Won-Young Lee, Lee-Sup Kim |
| A High Resolution Metastability-Independent Two-Step Gated Ring Oscillator TDC with Enhanced Noise Shaping |
| IEEE International Symposium on Circuits and Systems, 2010 |
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