| International Journal Papers |
| Daewoong Lee, Dongil Lee, Yong-Hun Kim, Hyunkyu Jeon, Byungguk Kim, Lee-Sup Kim |
| A 10.8 Gb/s Quarter-Rate 1 FIR 1 IIR Direct DFE with Non-Time-Overlapping Data Generation for 4:1 CMOS Clockless Multiplexer |
| IEEE Transactions on Circuits and Systems II: Express Briefs, 2020 |
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| Chongsoo Jung, Dongil Lee, Yong-Hun Kim, Daewoong Lee, Lee-Sup Kim |
| A 12 Gb/s 1.59 mW/Gb/s Input-Data-Jitter-Tolerant Injection-Type CDR with Super-Harmonic Injection-Locking in 65 nm CMOS |
| IEEE Transactions on Circuits and Systems II, 2019 |
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| Daewoong Lee, Dongil Lee, Yong-Hun Kim, Lee-Sup Kim |
| A 0.9-V 12-Gb/s 2-FIR Tap Direct DFE with Feedback-Signal Common-Mode-Control |
| IEEE Transactions on Very Large Scale Integration, 2019 |
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| Dongil Lee, Yong-Hun Kim, Daewoong Lee, Lee-Sup Kim |
| A 0.65V, 11.2Gb/s Power Noise Tolerant Source-synchronous Injection-locked Receiver with Direct DTLB DFE |
| IEEE Transactions on Circuits and Systems II, 2018 |
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| Yong-Hun Kim, Dongil Lee, Daewoong Lee, Lee-Sup Kim |
| A 10 Gb/s Reference-Less Baud-Rate CDR for Low Power Consumption with Direct Feedback Method |
| IEEE Transactions on Circuits and Systems II, 2018 |
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| International Conference Papers |
| Hyein Shin, Jaehyeong Sim, Daewoong Lee, Lee-Sup Kim |
| A PVT-robust Customized 4T Embedded DRAM Cell Array for Accelerating Binary Neural Networks |
| IEEE/ACM International Conference On Computer Aided Design, 2019 |
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| Daewoong Lee, Dongil Lee, Yong-Hun Kim, Lee-Sup Kim |
| A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed Tap Weighting Property in 65 nm CMOS |
| Symposium on VLSI Circuits, 2019 |
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| Daewoong Lee, Dongil Lee, Taeho Lee, Yong-Hun Kim, Lee-Sup Kim |
| An Integrated Time Register and Arithmetic Circuit with Combined Operation for Time-Domain Signal Processing |
| IEEE International Symposium on Circuits and Systems, 2015 |
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