Many-core architecture is becoming a promising solution for high performance parallel computing. There are many examples exploiting high parallelism using many core tiles. As more cores are integrated in a single chip and fabrication technology evolves, the power density also increases dramatically. This enormous power consumption leads to a thermal hazard, which is a major problem in high performance many-core processor design. 3-D IC, a package level break-through in many-core architecture, even exacerbates the thermal problem resulting from the lack of heat flow path between dies. Thus, thermal management is the key feature of many-core processor design. We pursue the optimal solution of this issue in several aspects such as circuit implementation, thermal management policy and thermal analysis technique.